DM320 SoC

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The core of the m:robe 500i is a proprietary Texas Instruments TMS320-series SoC (system-on-a-chip), the TMS320DM320. Datasheets are reportedly only available under NDA.

It is composed of an ARM 9 CPU, device-specific peripherals and a Texas Instruments C54x DSP.

Contents

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ARM Core

The CPU core of the chip is an ARM926EJ (according to Neuros DM320 Wiki).

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Identification

Running arm-cpu-id.c shows the following ARM core identification value: 41069263 (hexadecimal). According to ARM Application Note 99 (Core Type & Revision Identification), this represents (all values in hexadecimal):

  • Revision: 3
  • Primary Part Number: 926
  • Architecture: 6 (Architecture 5TEJ)
  • Variant: 0
  • Implementer: 41 ("A" in ASCII, meaning ARM Ltd.)
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DSP Core

The DSP core is a proprietary Texas Instruments C54x-series device. Datasheets are reportedly only available under NDA.

The device revision is 1.1 (from the value of the IO_BUSC_REVR, found using chip-id.c).

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Resources

  • Some documentation is available on the Neuros Wiki. The Neuros OSD (aka. Recorder III) is powered by the same SoC as the m:robe 500i.
  • The Cowon A2 also uses the same SoC. Cowon recently released the source code for their Linux-based firmware, as per the GPL: cowon_a2_bsp_source.tar.gz mirror
  • The DM320 seems to share some (but not all!) of the same peripherals as the TMS320DSC24
  • Software Development (i.e. actually getting the m:robe to run your code)
Retrieved from "http://mrobefan.elwiki.com/DM320_SoC"
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